Near Field Notes

Note 23Signal integrityRev 1Watch the video · 1:51

USB-C alt modes

What can a USB-C port carry besides USB?

Video, PCIe, headphones and debug links, in at least 12 ways besides plain USB. Most are agreed first in messages on CC, the configuration channel pin. Three are in wide use, three never caught on, two need only resistors, and four are vendors’ hidden modes.

The figure lights the pins each mode takes, colored and named by what they carry. Plain USB uses two of the four fast pairs and the USB 2 pins. That leaves two pairs and the two sideband pins free for something else.

24 pins, 12 ways in

Plain USB, then every mode

Plain USBThe defaultDisplayPort, 2 lanesVESA, 2014 · in useDisplayPort, 4 lanesVESA, 2014 · in useThunderbolt 3Intel, 2015 · in useUSB4USB-IF, 2019 · in useMHLMHL, 2014 · no phone foundHDMIHDMI, 2016 · no adapters by 2023VirtualLink2018 · abandoned 2020Analog audioDeprecated in 2023Chromebook debugGoogle’s debug cableAppleApple’s debug messagesGoogleGoogle’s firmware updatesNVIDIANVIDIA’s test modeSwitch 2Nintendo, 2025A faceUSB 3USB 2CCDPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLMicTo groundDebug USBPulled upSerial05AC18D1095530+ messagesB faceUSB 3USB 2DPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLAGNDTo groundDebug USBPulled upSerialPlain USBThe defaultDisplayPort, 2 lanesVESA, 2014 · in useDisplayPort, 4 lanesVESA, 2014 · in useThunderbolt 3Intel, 2015 · in useUSB4USB-IF, 2019 · in useMHLMHL, 2014 · no phone foundHDMIHDMI, 2016 · no adapters by 2023VirtualLink2018 · abandoned 2020Analog audioDeprecated in 2023Chromebook debugGoogle’s debug cableAppleApple’s debug messagesGoogleGoogle’s firmware updatesNVIDIANVIDIA’s test modeSwitch 2Nintendo, 2025A faceUSB 3USB 2CCDPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLMicTo groundDebug USBPulled upSerial05AC18D1095530+ messagesB faceUSB 3USB 2DPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLAGNDTo groundDebug USBPulled upSerialPlain USBThe defaultDisplayPort, 2 lanesVESA, 2014 · in useDisplayPort, 4 lanesVESA, 2014 · in useThunderbolt 3Intel, 2015 · in useUSB4USB-IF, 2019 · in useMHLMHL, 2014 · no phone foundHDMIHDMI, 2016 · no adapters by 2023VirtualLink2018 · abandoned 2020Analog audioDeprecated in 2023Chromebook debugGoogle’s debug cableAppleApple’s debug messagesGoogleGoogle’s firmware updatesNVIDIANVIDIA’s test modeSwitch 2Nintendo, 2025A faceUSB 3USB 2CCDPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLMicTo groundDebug USBPulled upSerial05AC18D1095530+ messagesB faceUSB 3USB 2DPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLAGNDTo groundDebug USBPulled upSerial
  • Video
  • Data
  • Audio
  • Debug or hidden
  • Control
At rest, DisplayPort on 2 lanes: DP on TX2 and RX2, USB 3 on TX1 and RX1, AUX on both SBU pins. Playing, it steps through plain USB and all 12 ways in.

The USB-C receptacle

24 pins, either way up

A USB-C receptacle is a steel shell around a thin tongue, with 12 contacts on each face. The two faces mirror each other, so a plug fits either way up and finds the same kind of pin in each place. Note 2 asks how the shell should meet ground.

Four pins carry ground and four carry power, VBUS. Four more carry USB 2, D+ and D− on each face. The other 12 are four fast pairs, two CC pins and two sideband pins, and they are what an alt mode borrows.

The receptacle
Fig. 23Tongue, 12 contacts on each faceShellFig. 23Tongue, 12 contacts on each faceShellFig. 23Tongue, 12 contacts on each faceShell
Drawn to the Type-C spec’s receptacle sizes. The opening is 8.34 mm wide and 2.56 mm tall.

The fast pairs are the SuperSpeed pairs: TX1 and RX2 on the A face, TX2 and RX1 on the B face. Plain USB 3 uses one TX and one RX pair. A plug the usual way up gets TX1 and RX1, and turned over, TX2 and RX2.

CC1 and CC2 are the configuration channel. The plug’s CC wire meets one of them, and which one tells the port how the plug went in. SBU1 and SBU2, the sideband use pins, carry nothing in plain USB.

The 24 pins
Fig. 23bGNDTX1VBUSD+ D−VBUSRX2GNDCC1SBU1A1A12A faceGNDTX2VBUSD+ D−VBUSRX1GNDCC2SBU2B1B12B face, turned overFig. 23bGNDTX1VBUSD+ D−VBUSRX2GNDCC1SBU1A1A12A faceGNDTX2VBUSD+ D−VBUSRX1GNDCC2SBU2B1B12B face, turned overFig. 23bGNDTX1VBUSD+ D−VBUSRX2GNDCC1SBU1A1A12A faceGNDTX2VBUSD+ D−VBUSRX1GNDCC2SBU2B1B12B face, turned over
Looking into the port. The B face is drawn turned over, so B1 sits where A1 does. The fast pairs are in bold.
The table
The pin in each place, counted from the left as you look into the port.
PlaceA faceB face, turned over
1GNDGND
2TX1+TX2+
3TX1-TX2-
4VBUSVBUS
5CC1CC2
6D+D+
7D-D-
8SBU1SBU2
9VBUSVBUS
10RX2-RX1-
11RX2+RX1+
12GNDGND

Agreeing on a mode

Messages on CC

No pin changes job until both ends agree. The laptop, as the host, asks over CC in USB Power Delivery’s structured vendor-defined messages, or VDMs. It asks who the other end is, which modes it knows, and then enters one.

Each mode is named by a 16-bit ID, an SVID. DisplayPort’s is FF01. Only the host may send Enter Mode, and only after the discovery steps are done.

The talk on CC
Fig. 23cLaptopMonitorDiscover IdentityIts vendor, product and typeDiscover SVIDsFF01: DisplayPortDiscover ModesPin assignments it can takeEnter ModeACKDP Status Update, DP ConfigureACKAttention: a screen is plugged inThen both switch chips move DisplayPort ontothe fast pairsFig. 23cLaptopMonitorDiscover IdentityIts vendor, product and typeDiscover SVIDsFF01: DisplayPortDiscover ModesPin assignments it can takeEnter ModeACKDP Status Update, DP ConfigureACKAttention: a screen is plugged inThen both switch chips move DisplayPort onto the fast pairsFig. 23cLaptopMonitorDiscover IdentityIts vendor, product and typeDiscover SVIDsFF01: DisplayPortDiscover ModesPin assignments it can takeEnter ModeACKDP Status Update, DP ConfigureACKAttention: a screen is plugged inThen both switch chips move DisplayPort onto the fast pairs
DisplayPort as the example, in the order of the USB Type-C and Power Delivery specs. Status Update and Configure are DisplayPort’s own steps. A screen plugged in later is reported with Attention.
The table
In order, on the CC wire.
FromMessage
LaptopDiscover Identity
MonitorIts vendor, product and type
LaptopDiscover SVIDs
MonitorFF01: DisplayPort
LaptopDiscover Modes
MonitorPin assignments it can take
LaptopEnter Mode
MonitorACK
LaptopDP Status Update, DP Configure
MonitorACK
MonitorAttention: a screen is plugged in

The switch chip

Which pairs go where

Once a mode is entered, a switch chip behind the receptacle routes each fast pair to the right controller. TI’s HD3SS460 is one. Its AMSEL pin picks 2 lanes of video beside USB 3, or all 4 lanes of video. Its POL pin undoes a plug turned over, and it switches the SBU pins too.

USB 2 has pins of its own, so in most modes it keeps working whatever the fast pairs carry.

One chip, three settings
Fig. 23dPlain USBUSB 3 on TX1 and RX1USB 3DisplayPortTX1 RX1TX2 RX2USB 2 on its own pinsDisplayPort, 2 lanesPin assignment DUSB 3DisplayPortTX1 RX1TX2 RX2USB 2 on its own pinsDisplayPort, 4 lanesPin assignment CUSB 3DisplayPortTX1 RX1TX2 RX2USB falls back to the USB 2 pinsFig. 23dPlain USBUSB 3 on TX1 and RX1USB 3DisplayPortTX1 RX1TX2 RX2USB 2 on its own pinsDisplayPort, 2 lanesPin assignment DUSB 3DisplayPortTX1 RX1TX2 RX2USB 2 on its own pinsDisplayPort, 4 lanesPin assignment CUSB 3DisplayPortTX1 RX1TX2 RX2USB falls back to the USB 2 pinsFig. 23dPlain USBUSB 3 on TX1 and RX1USB 3DisplayPortTX1 RX1TX2 RX2USB 2 on its own pinsDisplayPort, 2 lanesPin assignment DUSB 3DisplayPortTX1 RX1TX2 RX2USB 2 on its own pinsDisplayPort, 4 lanesPin assignment CUSB 3DisplayPortTX1 RX1TX2 RX2USB falls back to the USB 2 pins
The plug the usual way up. The two DisplayPort settings are pin assignments D and C of VESA’s DisplayPort Alt Mode.
The table
SettingNameTX1 RX1TX2 RX2USB
Plain USBUSB 3 on TX1 and RX1USB 3Not takenUSB 2 on its own pins
DisplayPort, 2 lanesPin assignment DUSB 3DisplayPortUSB 2 on its own pins
DisplayPort, 4 lanesPin assignment CDisplayPortDisplayPortUSB falls back to the USB 2 pins

DisplayPort

VESA, September 2014

VESA published DisplayPort Alt Mode in September 2014, and it is the most widely used video alt mode. Its choice between 2 and 4 lanes decides what is left for USB. Note 14 follows DisplayPort onto other kinds of wire.

What each setting carries
  • Video
  • USB
Fig. 23e0102030Pin assignment D2 lanes of video, USB 3To the screenTo USBPin assignment C4 lanes of videoTo the screenTo USB16.21032.40.48Gb/s on the wiresFig. 23e0102030Pin assignment D2 lanes of video, USB 3To the screenTo USBPin assignment C4 lanes of videoTo the screenTo USB16.21032.40.48Gb/s on the wiresFig. 23e0102030Pin assignment D2 lanes of video, USB 3To the screenTo USBPin assignment C4 lanes of videoTo the screenTo USB16.21032.40.48Gb/s on the wires
Line rates, with the line code’s extra bits still in. DisplayPort runs at HBR3, 8.1 Gb/s a lane, beside USB 3.2 Gen 2 at 10 Gb/s and USB 2.0 at 0.48 Gb/s.
The table
Line rates of DisplayPort at HBR3, USB 3.2 Gen 2 and USB 2.0.
SettingTo the screenTo USB
Pin assignment D16.2 Gb/s10 Gb/s
Pin assignment C32.4 Gb/s0.48 Gb/s
446

Thunderbolt and USB4

One link, three kinds of traffic

Thunderbolt 3 and USB4 take all four fast pairs as one link. A router at each end cuts DisplayPort, PCIe and USB into packets, sends them mixed and sorts them out again, so no pair belongs to any one of them.

Tunneling
  • Video
  • Data
Fig. 23fDisplayPortPCIeUSB 3Laptop’s routerDPPCIeUSBDPUSB4 fast pairs, one linkDock’s routerScreenPCIe deviceUSB hubFig. 23fDisplayPortPCIeUSB 3Laptop’s routerDPPCIeUSBDPUSBPCIe4 fast pairs, one linkDock’s routerScreenPCIe deviceUSB hubFig. 23fDisplayPortPCIeUSB 3Laptop’s routerDPPCIeUSBDPUSBPCIeDPUSBDP4 fast pairs, one linkDock’s routerScreenPCIe deviceUSB hub
A sketch, not to scale. Each packet holds one kind of traffic.
448

The graveyard

MHL, HDMI and VirtualLink

Three more alt modes got specs and never caught on. HDMI’s backers said in 2023 they would not update theirs, and VirtualLink’s group had gone quiet by 2020. No phone is known to have shipped with MHL Alt Mode.

Three modes, by year
Fig. 23g2014201820222026MHLChips 2015. No phone with it foundHDMI2023: no adapters, no spec updatesVirtualLinkOn RTX 20 cards. Abandoned 2020Fig. 23g2014201620182020202220242026MHLChips 2015. No phone with it foundHDMI2023: no adapters, no spec updatesVirtualLinkOn RTX 20 cards. Abandoned 2020Fig. 23g2014201620182020202220242026MHLChips 2015. No phone with it foundHDMI2023: no adapters, no spec updatesVirtualLinkOn RTX 20 cards. Abandoned 2020
A dot marks each spec, and a cross the year it was reported stopped. No end has been reported for MHL.
450

VirtualLink

One cable for a VR headset

VirtualLink, from July 2018, put a VR headset on one cable: four lanes of DisplayPort at HBR3, USB 3.1 Gen 2 at 10 Gb/s, and up to 27 W of power. NVIDIA, Oculus, Valve, AMD and Microsoft led it.

With every fast pair carrying video, it moved USB 3 onto the four USB 2 pins: A6 and A7 as one pair, B6 and B7 as the other. A USB-C cable has one unshielded pair for USB 2, so VirtualLink needed a cable with two shielded ones.

NVIDIA’s RTX 20 Founders Edition cards had the port, and their Super versions kept it. The RTX 30 cards dropped it. StarVR and XTAL headsets used it. Valve canceled its Index adapter, and in September 2020 Road to VR reported that the group behind it had not been active for some time. Its ID on CC was NVIDIA’s own, 0955.

Two cables, cut across
Fig. 23hA full-featuredUSB-C cable4 shielded pairs1 unshielded pairVirtualLink’scable4 shielded pairs2 more for USB 3Fig. 23hA full-featured USB-C cable4 shielded fast pairs1 unshielded USB 2 pairVirtualLink’s cable4 shielded fast pairs2 shielded pairs for USB 3Fig. 23hA full-featured USB-C cable4 shielded fast pairs1 unshielded USB 2 pairVirtualLink’s cable4 shielded fast pairs2 shielded pairs for USB 3
Not to scale. Gray ovals are shields, and the green wires are the pairs for USB 2 or, in VirtualLink’s cable, USB 3. The small single wires stand for power, CC and the sideband lines.

By resistor alone

Accessory modes

Two accessories need no messages. A device normally pulls one CC pin down through Rd, 5.1 kΩ. These tie both CC pins the same way, and the port reads that pattern as the mode.

Two accessories
  • Audio
  • Debug
Fig. 23iAudio adapterCC1≤ Ra to groundCC2≤ Ra to groundD+RightD−LeftSBU1MicSBU2AGNDChromebook debug cableCC122 kΩ to VBUSCC245.3 kΩ to VBUSD+ D−USB 2SBU1 SBU2Debug USBFig. 23iAudio adapterCC1≤ Ra to groundCC2≤ Ra to groundD+RightD−LeftSBU1MicSBU2AGNDChromebook debug cableCC122 kΩ to VBUSCC245.3 kΩ to VBUSD+ D−USB 2SBU1 SBU2Debug USBFig. 23iAudio adapterCC1≤ Ra to groundCC2≤ Ra to groundD+RightD−LeftSBU1MicSBU2AGNDChromebook debug cableCC122 kΩ to VBUSCC245.3 kΩ to VBUSD+ D−USB 2SBU1 SBU2Debug USB
Ra is 800 Ω to 1.2 kΩ in the Type-C spec. Mic and AGND, the audio ground, swap if the plug is turned over. The debug cable’s two resistors differ so the Chromebook can tell which way it went in.
The table
AccessoryPins
Audio adapterCC1: ≤ Ra to ground, CC2: ≤ Ra to ground, D+: Right, D−: Left, SBU1: Mic, SBU2: AGND
Chromebook debug cableCC1: 22 kΩ to VBUS, CC2: 45.3 kΩ to VBUS, D+ D−: USB 2, SBU1 SBU2: Debug USB
452

Hidden modes

Vendors’ own IDs

A company can run modes under its own USB vendor ID and define them as it likes. What is public about them comes from open-source code and outside research.

IDs on CC
Fig. 23jStandard IDs, given out by the USB-IFFF00USB Power Delivery itselfFF01DisplayPort, for VESAVendor IDs, each its owner’s8087Intel: Thunderbolt 30955NVIDIA: VirtualLink and a test mode18D1Google: firmware updates05ACApple: debug, such as a serial portFig. 23jStandard IDs, given out by the USB-IFFF00USB Power Delivery itselfFF01DisplayPort, for VESAVendor IDs, each its owner’s8087Intel: Thunderbolt 30955NVIDIA: VirtualLink and a test mode18D1Google: firmware updates05ACApple: debug, such as a serial portFig. 23jStandard IDs, given out by the USB-IFFF00USB Power Delivery itselfFF01DisplayPort, for VESAVendor IDs, each its owner’s8087Intel: Thunderbolt 30955NVIDIA: VirtualLink and a test mode18D1Google: firmware updates05ACApple: debug, such as a serial port
As Chromium’s EC code and Linux define them.
The table
IDKindWhat it names
FF00Standard IDsUSB Power Delivery itself
FF01Standard IDsDisplayPort, for VESA
8087Vendor IDsIntel: Thunderbolt 3
0955Vendor IDsNVIDIA: VirtualLink and a test mode
18D1Vendor IDsGoogle: firmware updates
05ACVendor IDsApple: debug, such as a serial port
454

USB-C priority

A monitor’s menu

A monitor with a USB-C input and a USB hub inside has to make DisplayPort’s choice, so it asks you. Dell’s manuals call it USB-C Prioritization, with a choice of High Resolution or High Data Speed.

Dell’s G3223D guide spells it out. High Resolution, the default, sends 4 lanes at HBR3 and cuts the monitor’s USB to USB 2.0. High Data Speed sends 2, which leaves the other two pairs for USB 3, as in Fig. 23d.

The monitor’s question
Fig. 23kUSB-C PrioritizationHigh Data SpeedHigh ResolutionHigh Data Speed2 lanes to the screen, USB 3 portsHigh Resolution4 lanes to the screen, USB 2 portsFig. 23kUSB-C PrioritizationHigh Data Speed2 lanes to the screenUSB 3 portsHigh Resolution4 lanes to the screenUSB 2 portsFig. 23kUSB-C PrioritizationHigh Data Speed2 lanes to the screenUSB 3 portsHigh Resolution4 lanes to the screenUSB 2 ports
Dell’s wording, from its monitor guides, with High Resolution picked as the G3223D ships.
The table
ChoiceTo the screenThe monitor’s USB ports
High Data Speed2 lanes to the screenUSB 3 ports
High Resolution4 lanes to the screenUSB 2 ports

All 12 side by side

Every mode’s pins

Here is every mode by the pins it takes. In this chart only VirtualLink and analog audio put something other than USB 2 on the USB 2 pins. Apple’s serial port can also use D+ and D− in place of the SBU pins.

Google’s and NVIDIA’s modes are drawn on CC alone, because their sources name no other pins. The Switch 2 shows only the pins every DisplayPort setting shares.

Every mode’s pins
  • Video
  • Data
  • Audio
  • Debug or hidden
  • Control
Fig. 23lPin 112A face over B facePlain USBUSB 3 on 2 pairs, USB2 on its own pinsIn useDisplayPort, 2 lanesVideo on 2 pairs, USB 3on 2DisplayPort, 4 lanesVideo on all 4 pairs,USB 2 onlyThunderbolt 3One link on all 4 pairsUSB4One link on all 4 pairsThe graveyardMHLPhone video on 1, 2 or 4pairs, drawn on 2HDMIHDMI 1.4b on all 4pairsVirtualLinkVideo on all 4 pairs,USB 3 on the USB 2pinsBy resistor aloneAnalog audioHeadphones on the USB2 and SBU pinsChromebook debugA debug USB link on theSBU pinsHiddenAppleA serial port, here onthe SBU pinsGoogleMessages on CC onlyNVIDIAMessages on CC onlySwitch 230+ messages on CC,then DisplayPortFig. 23lPin 112A face over B facePlain USBUSB 3 on 2 pairs, USB 2 on its ownpinsIn useDisplayPort, 2 lanesVideo on 2 pairs, USB 3 on 2DisplayPort, 4 lanesVideo on all 4 pairs, USB 2 onlyThunderbolt 3One link on all 4 pairsUSB4One link on all 4 pairsThe graveyardMHLPhone video on 1, 2 or 4 pairs,drawn on 2HDMIHDMI 1.4b on all 4 pairsVirtualLinkVideo on all 4 pairs, USB 3 on theUSB 2 pinsBy resistor aloneAnalog audioHeadphones on the USB 2 and SBUpinsChromebook debugA debug USB link on the SBU pinsHiddenAppleA serial port, here on the SBU pinsGoogleMessages on CC onlyNVIDIAMessages on CC onlySwitch 230+ messages on CC, thenDisplayPortFig. 23lPin 112A face over B facePlain USBUSB 3 on 2 pairs, USB 2 on its own pinsIn useDisplayPort, 2 lanesVideo on 2 pairs, USB 3 on 2DisplayPort, 4 lanesVideo on all 4 pairs, USB 2 onlyThunderbolt 3One link on all 4 pairsUSB4One link on all 4 pairsThe graveyardMHLPhone video on 1, 2 or 4 pairs, drawn on 2HDMIHDMI 1.4b on all 4 pairsVirtualLinkVideo on all 4 pairs, USB 3 on the USB 2 pinsBy resistor aloneAnalog audioHeadphones on the USB 2 and SBU pinsChromebook debugA debug USB link on the SBU pinsHiddenAppleA serial port, here on the SBU pinsGoogleMessages on CC onlyNVIDIAMessages on CC onlySwitch 230+ messages on CC, then DisplayPort
Each mode as two rows of 12 squares, the A face over the B face turned over, with the plug the usual way up. DisplayPort is shown at both settings, so 14 rows hold plain USB and the 12.
The table
Each mode’s pins, in words. Plain USB is shown plugged in the usual way up.
ModeFast pairsUSB 2 pinsSBU pinsCCStatus
Plain USBUSB 3 on TX1 and RX1USB 2Not takenCCThe default
DisplayPort, 2 lanesDP, USB 3USB 2AUXCCVESA, 2014 · in use
DisplayPort, 4 lanesDPUSB 2AUXCCVESA, 2014 · in use
Thunderbolt 3TB3USB 2SidebandCCIntel, 2015 · in use
USB4USB4USB 2SidebandCCUSB-IF, 2019 · in use
MHLMHL on 1, 2 or 4 pairs. Drawn on 2, with USB 3USB 2Not takenCCMHL, 2014 · no phone found
HDMIHDMIUSB 2HEACCCHDMI, 2016 · no adapters by 2023
VirtualLinkDPUSB 3AUXCC2018 · abandoned 2020
Analog audioNot takenright, leftMic / AGNDTo groundDeprecated in 2023
Chromebook debugNot takenUSB 2Debug USBPulled upGoogle’s debug cable
AppleNot takenUSB 2, or the serial port in place of SBUSerial05ACApple’s debug messages
GoogleNot takenNot takenNot taken18D1Google’s firmware updates
NVIDIANot takenNot takenNot taken0955NVIDIA’s test mode
Switch 2DP on TX2 and RX2. TX1 and RX1 not publishedNot takenAUX30+ messagesNintendo, 2025

Which mode is this?

From the CC pins up

A port’s CC pins, and the messages on them, say which mode it is in. The key reads them in order.

Key to USB-C modes

Which mode is this port in?

  1. 1aBoth CC pins are tied the same way, by resistors aloneGo to 2
  2. 1bOnly one CC pin is pulled down, through RdGo to 3
  3. 2aBoth go to ground through Ra or lessAnalog audio
  4. 2bBoth have Rp, or both have RdA debug accessory, such as a Chromebook’s cable
  5. 3aNo mode is entered, or no messages pass at allPlain USB
  6. 3bIt sends Enter_USBUSB4
  7. 3cIt sends Enter Mode with an IDGo to 4
  8. 4aFF01DisplayPort, 2 or 4 lanes
  9. 4b8087, Intel’sThunderbolt 3
  10. 4c0955, NVIDIA’sVirtualLink, or NVIDIA’s test mode
  11. 4d05AC or 18D1Apple’s or Google’s own modes

MHL’s and HDMI’s IDs aren’t in the sources here. A Switch 2 and its dock trade their unstructured messages before step 4.

Pick a mode yourself

Plain USB and all 12

Pick a mode to light its pins on both faces. The readings say what asks for it, what it puts on the fast pairs and the SBU pins, and where it stands now.

Default
In use
The graveyard
By resistor alone
Hidden
The receptacle’s pins

DisplayPort, 4 lanes

Video on all 4 pairs, USB 2 only

A faceUSB 3USB 2CCDPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLMicTo groundDebug USBPulled upSerial05AC18D1095530+ messagesB faceUSB 3USB 2DPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLAGNDTo groundDebug USBPulled upSerialA faceUSB 3USB 2CCDPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLMicTo groundDebug USBPulled upSerial05AC18D1095530+ messagesB faceUSB 3USB 2DPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLAGNDTo groundDebug USBPulled upSerialA faceUSB 3USB 2CCDPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLMicTo groundDebug USBPulled upSerial05AC18D1095530+ messagesB faceUSB 3USB 2DPAUXDPTB3TB3SidebandUSB4USB4MHLHDMIHDMIHEACUSB 3RLAGNDTo groundDebug USBPulled upSerial
Asked for by
Messages naming FF01
Fast pairs
All 4 video
SBU pins
DisplayPort’s AUX
Status
VESA, 2014 · in use
The plug the usual way up. Fig. 23l’s table has every mode in words.

Conditions

Method
Read from specs, datasheets, open-source code and published research, listed under Sources.
Pins
The receptacle’s pinout from release 2.3 of the USB Type-C spec. Each mode’s pins from the sources that describe it.
Plug
Every figure shows the plug the usual way up, its CC wire on CC1. Turned over, the same jobs move to the other face.
Plain USB
Drawn as one lane, TX1 and RX1. USB 3.2’s two-lane rates, Gen 1x2 and Gen 2x2, use all four pairs.
Rates
Line rates as each spec gives them: DisplayPort HBR3, USB 3.2 Gen 2 and USB 2.0.
Count
12 ways: DisplayPort, Thunderbolt 3, USB4, MHL, HDMI, VirtualLink, analog audio, the Chromebook debug cable, and Apple’s, Google’s, NVIDIA’s and Nintendo’s modes. DisplayPort counts once, with two settings.
Renders
Blender, one receptacle built to the Type-C spec’s sizes.

From specs and public documents only. Nothing here was measured or simulated.

Limits

  • MHL’s and HDMI’s IDs on CC aren’t in the sources here, so the key leaves them out.
  • Nintendo hasn’t published how many lanes the Switch 2 uses after its handshake. Only the pins every DisplayPort setting shares are lit.
  • Vendor modes are known only as far as open code and outside research show them. There may be more.
  • An Ethernet alt mode was suggested on an IEEE 802.3 list in 2015 and never adopted, so it isn’t counted.
  • The lane counts behind Dell’s menu come from one guide, the G3223D’s.

Files

  • anim/modes.pyEvery mode’s pins, with a source for each
  • render/port_site.pyThe renders in Fig. 23 and on the faces
  • refs/research.mdThe research notes behind the sources

Sources

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