---
title: "PHY and link layer"
question: "What does the PHY do, and what does the link layer do?"
url: "https://nearfieldnotes.com/videos/phy-link/"
site: "Near Field Notes"
video: "https://nearfieldnotes.com/media/phy-link/full.mp4"
duration: "1:58"
date: "2026-11-04"
note: "https://nearfieldnotes.com/notes/phy-link/"
---

# PHY and link layer (video)

What does the PHY do, and what does the link layer do?

1:58, with sound. [Read Note 14](https://nearfieldnotes.com/notes/phy-link/) for the full answer, with figures, conditions and sources.

## Transcript

HDMI 2.1 turned its clock pair into a fourth data lane.

Now its wires work a lot like DisplayPort's. The link layer on top is still different.

The PHY is how a bit looks on the wire: the voltage, the code, and where the clock comes from.

The link layer is what the bits mean: where a frame starts, who it's for, and if it arrived intact.

Ethernet splits them into two chips.

The MAC in the processor builds the frame. The PHY chip puts it on the cable.

That frame was published in 1980. Today's frame still has the same fields.

The PHY under it went from 10 megabits to 10 gigabits.

Break the third or fourth pair, and some gigabit PHYs quietly drop to 100 megabits.

On some chips, the same pins can be PCIe, SATA or a network port. You pick one.

USB 3 even shares PCIe 2's signaling: 5 gigabits, with the same 8b/10b code.

Your phone's camera link can run on two different PHYs.

One sends the clock on its own pair. The other uses three wires at three levels, with the clock built in.

Bluetooth LE has three PHYs, and a live connection can switch between them.

On a CAN bus, a 0 always beats a 1 on the wire.

So when two nodes talk at once, the lower ID wins, and its message goes through untouched.

HDMI started as DVI, with the audio hidden in the gaps between video lines.

A DP++ port spots an HDMI adapter on one pin, and switches to HDMI's PHY.

DisplayPort 2.0 borrowed its PHY from Thunderbolt 3.

And over USB4, DisplayPort never touches the cable. It rides inside USB4 packets.

USB4 even strips DisplayPort's padding and FEC parity, then rebuilds them at the far end.

Some chips, like this RK3588, use one PHY for HDMI 2.1 or a laptop panel's DisplayPort.

HDMI still uses its 3.3 V signaling. But its lanes now work like DisplayPort's.

The PHY moves the bits. The link layer decides what they mean.

---

Source: https://nearfieldnotes.com/videos/phy-link/