---
title: "Near Field Notes: a field guide to circuit boards"
url: "https://nearfieldnotes.com/"
site: "Near Field Notes"
---

# Near Field Notes

A field guide to circuit boards. Real boards side by side at one scale, with an arrow on the mark that changes the result.

Each note asks one question about real boards or parts and answers it with simulation or public sources. Measured numbers say so.

## Power

A FET rings, runs hot or a rail misbehaves. [All Power notes](https://nearfieldnotes.com/families/power/)

- [Gate ringing](https://nearfieldnotes.com/notes/gate-ringing/): How hard should you drive a half bridge? As hard as it goes without ringing. At its 1 A power-on setting, the gate driver on moteus-c1 rings its 80 V FET to 81 V at 48 V. 190 mA stays at 48 V, and 30 mA loses 3.3 W at 100 kHz.
- [Zero-voltage switching](https://nearfieldnotes.com/notes/zvs/): What is zero-voltage switching, and what does it save? Turning a switch on only after a current has already pulled the voltage across it to zero. A pair of 80 V FETs switching 10 A at 48 V then loses 0.45 µJ per turn-on, instead of 2.6 µJ.
- [GaN vs silicon](https://nearfieldnotes.com/notes/gan-vs-si/): Why are USB-C chargers going GaN? Because a GaN switch and its driver lose about a quarter as much energy each time it flips. In the same 65 W charger at 120 V AC, that’s 1.73 µJ a flip for silicon and 0.42 µJ for GaN, so GaN can flip four times as often for the same heat. A charger that flips faster needs a smaller transformer.
- [Power inductors](https://nearfieldnotes.com/notes/inductor-types/): Does it matter how a 4.7 µH inductor is built? Yes. Built five common ways, the same 4.7 µH puts anywhere from 0.44 mV to 7.5 mV on a trace 1 mm away, and loses 30% of its inductance at anywhere from 0.18 A to 4.7 A. How it’s built decides where its field goes and how much current it takes.
- [Capacitors](https://nearfieldnotes.com/notes/capacitor-types/): Which kind of capacitor should feed a load? The one whose time scale matches the load’s. On the same 1 A spike, a ceramic MLCC drops least for the first 0.31 µs, a polymer tantalum until 12 µs, a supercap until 0.29 s, and a lithium-ion capacitor after that. On the same 1 mW load, six kinds last from 1.1 s to 40 h.
- [Battery balance](https://nearfieldnotes.com/notes/battery-balance/): Why does a LiPo pack need balancing? Because a plain charger watches only the total. On a 3S pack with one cell faded to 90%, a plain charge stops at 12.60 V with that cell at 4.25 V, past its 4.20 V limit. A balance charge watches every cell and stops each one at 4.20 V.
- [LiPo vs LiFePO4](https://nearfieldnotes.com/notes/lipo-vs-life/): How does a LiFePO4 cell differ from a LiPo? A LiFePO4 cell, or LiFe, holds less energy for its weight, lasts longer and fails more gently, but its flat voltage hides how full it is. Read with the same 10 mV error, a half-full LiPo could be 47 to 53% and a half-full LiFe anywhere from 42 to 71%. So a LiFe needs a gauge that counts charge and a charger set for 3.60 V a cell.
- [FET choice](https://nearfieldnotes.com/notes/fet-choice/): Is the FET with the lowest Rds(on) the best one? Only with a fast gate driver. In moteus-c1’s 48 V, 10 A half bridge at 30 kHz, the 1.2 mΩ IRFS7530 loses 0.77 W and the 15 mΩ TPN19008QM 1.98 W with 1 A of gate current. At 60 mA they lose 9.08 W and 2.41 W.
- [Power quadrants](https://nearfieldnotes.com/notes/power-quadrants/): What are 1-, 2- and 4-quadrant power supplies? They differ in which way current can flow through the output, and at which polarity. A 1-quadrant supply only pushes current out at positive voltage, a 2-quadrant one can also take it back, and a 4-quadrant one does both at either polarity. You need more than one quadrant only when your load gives power back or its voltage has to cross zero.
- [SIMO converters](https://nearfieldnotes.com/notes/simo/): Can one inductor feed three rails? Yes, if the rails take turns. A single-inductor multiple-output converter, or SIMO, runs this watch’s three rails for 8.6 h, against 8.8 h from three bucks and 4.3 h from three LDOs. It takes 61% of the bucks’ board area.

## Sensing

A current or voltage reads wrong. [All Sensing notes](https://nearfieldnotes.com/families/sensing/)

- [Shunt taps](https://nearfieldnotes.com/notes/shunt-taps/): Where do you tap a 0.5 mΩ shunt? At the middle of the pads’ inner edges. With 10 A through the 0.5 mΩ shunt moteus-x1 uses, sense traces there read 10.1 A. Vias 2 mm out on the copper read 14.1 A.
- [Sense position](https://nearfieldnotes.com/notes/sense-position/): Low side, high side or in line: where should a motor drive sense current? Low side, unless the motor needs every volt or a phase shorted to ground must trip the drive. Its amp sits at ground and costs least, but moteus-c1’s amp needs the bottom FET on for 3 µs of each 30 kHz cycle. That caps the motor at 43.7 V of 48 V at best, and moteus-c1’s firmware stops at 39.4 V. In line gives all 48 V and high side catches the short, each with an amp that rides 48 V.

## Signal integrity

A fast signal fails at a connector. [All Signal integrity notes](https://nearfieldnotes.com/families/si/)

- [Ground cut](https://nearfieldnotes.com/notes/ground-cut/): Should you cut ground under connector pads? Yes, on high-speed pairs whose pads are wider than their traces. A hole the size of the pads takes USB-C’s 6% impedance dip to 0.5%, and one 0.2 mm bigger overshoots by 6%.
- [Eye diagram](https://nearfieldnotes.com/notes/eye-diagram/): How do you read an eye diagram? Measure the opening at its middle. Its height is your voltage margin and its width your timing margin. Then ask how many bits drew it. A 10 Gbit/s lane 82% open on a scope is 70% open at the 10¹² bits its spec counts.
- [PHY and link layer](https://nearfieldnotes.com/notes/phy-link/): What does the PHY do, and what does the link layer do? The PHY decides how bits look on the wire. It sets the voltages, the line code and where the clock comes from. The link layer decides what the bits mean. It marks where a frame starts, who it’s for and whether it arrived intact. Either one can change while the other stays.
- [TDR](https://nearfieldnotes.com/notes/tdr/): How do you read a TDR trace? As a map of the route. Across is distance: on this board, every 11.8 ps of echo time is 1 mm of trace. Up is impedance: a dip is extra capacitance, and a bump is extra inductance or a broken return path. Read it with the edge your spec names. The CM5 IO board’s USB-A socket pins read 67 Ω with a 15 ps edge and 83 Ω with USB 3.0’s 50 ps, inside its 90 ± 15 Ω.
- [Via stubs](https://nearfieldnotes.com/notes/via-stubs/): How long a via stub can a fast link take? About 23.6 mm divided by the lane’s rate in GBd: 2.3 mm for 10GBASE-KR, 0.7 mm for PCIe 5. Past that, the stub costs more than about 0.5 dB at the link’s Nyquist frequency. A via to layer 3 of a 1.6 mm board leaves 0.94 mm, fine to about 25 Gb/s.
- [USB-C alt modes](https://nearfieldnotes.com/notes/usb-c-alt-modes/): What can a USB-C port carry besides USB? Video, PCIe, headphones and debug links, in at least 12 ways besides plain USB. Most are agreed first in messages on CC, the configuration channel pin. Three are in wide use, three never caught on, two need only resistors, and four are vendors’ hidden modes.
- [I3C vs I2C](https://nearfieldnotes.com/notes/i3c-vs-i2c/): What is I3C, and how does it differ from I2C? I3C is MIPI’s faster successor to I2C, on the same two wires. Its chips drive both lines up and down instead of waiting on pull-up resistors, so a 12-byte sensor read takes 13.1 µs and 28.2 nJ, against 344 µs and 203 nJ on I2C at 400 kHz. It also hands out addresses and carries interrupts over the bus, so the extra pins an I2C board needs go away.
- [Line codes](https://nearfieldnotes.com/notes/line-codes/): Why do fast serial links use line codes like 8b/10b? To keep edges coming so the receiver can find its clock, and to keep the line balanced so its coupling caps don’t charge up. 8b/10b does both by sending each byte as 10 bits, which is why SATA’s 6 Gb/s carries 600 MB/s, not 750. Faster links scramble the bits instead and add a short header to every 64 or 128, for 1.5 to 3%.
- [Car camera coax](https://nearfieldnotes.com/notes/car-camera-coax/): How does one coax carry a car camera’s video, control and power? Power rides along as DC, and the data rides on top of it in both directions at once. Four coils keep the data out of the 12 V supply, and each chip subtracts its own signal to hear the other end. On Antmicro’s GMSL2 boards the coils hold 1 kΩ or more over 86% of the band ADI recommends, and over 15 m of coax the video loses 15.9 dB at 3 GHz, where ADI allows 21.1 dB.
- [CRCs on fast links](https://nearfieldnotes.com/notes/crc/): How does a CRC catch bad bits, and what do fast links do when it fails? It divides the frame by a fixed polynomial and sends the remainder, and the receiver’s own division has to land on a known constant. Ethernet’s CRC-32 catches any 3 flipped bits in a full 1518-byte frame, and any burst up to 32 bits long. Ethernet drops a bad frame, PCIe and DDR memory send it again, and a cut-through switch that has already sent most of it stomps its CRC so the next box knows.

## EMC

It fails an emissions scan or an ESD zap. [All EMC notes](https://nearfieldnotes.com/families/emc/)

- [USB-C shell](https://nearfieldnotes.com/notes/usb-c-shell/): Should a USB-C shell go straight to ground, or through an RC? Straight, unless an earthed box or cable shield touches it too. An 8 kV zap puts the same 30 A into the board’s ground either way. Through 1 MΩ beside 4.7 nF, the cap is left holding 249 V. Common 0805 caps are rated 50 V.
- [Spread spectrum](https://nearfieldnotes.com/notes/spread-spectrum/): What does spread spectrum do to a buck’s EMI test? Almost nothing at its 400 kHz clock. It takes 10 dB off the 4 MHz reading and 12 dB off 30 MHz.

## RF

A radio’s range comes up short. [All RF notes](https://nearfieldnotes.com/families/rf/)

- [Antenna ground](https://nearfieldnotes.com/notes/antenna-ground/): How much ground does a 2.4 GHz PCB antenna need? About 40 mm behind the antenna. With 10 mm, 22% of the power gets out, and a perfect matching network only lifts that to 43%.
- [Trace or U.FL jumper](https://nearfieldnotes.com/notes/ufl-jumper/): When does a U.FL jumper beat a trace to the antenna? Past about 2.0 cm at 5.5 GHz on a common 4-layer board. Over 10 cm there, a trace delivers 60% of the radio’s power and a coax jumper between two U.FL connectors 83%. On a 2-layer board at 915 MHz, the trace wins up to 13.3 cm.

## Board and fab

A joint won’t solder. [All Board and fab notes](https://nearfieldnotes.com/families/fab/)

- [Thermal relief](https://nearfieldnotes.com/notes/thermal-relief/): Should a ground pin tie into the plane through a thermal relief? Yes, if it gets soldered. On a 4-layer board with the fab’s default copper, a 402 °C iron melts the solder on the far side through KiCad’s default spokes in 3 s. Tied in solid, it needs 536 °C. A Hakko FX-888D tops out at 480 °C.

## Logistics

- [Chip journeys](https://nearfieldnotes.com/notes/chip-journeys/): Where does a chip travel before it reaches your board? Often to another continent and back. TI makes the INA240’s wafers in Richardson, Texas, 61 km from Mouser. They are packaged and tested in Kuala Lumpur, so the chip travels about 31,100 km to reach that shelf.

## More

- [Glossary of circuit board terms](https://nearfieldnotes.com/glossary/)
- [Videos](https://nearfieldnotes.com/videos/): 28 short videos, one per topic
- [Every note in one file](https://nearfieldnotes.com/llms-full.txt)
- [Atom feed](https://nearfieldnotes.com/feed.xml)

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Source: https://nearfieldnotes.com/