---
title: "Signal integrity"
url: "https://nearfieldnotes.com/families/si/"
site: "Near Field Notes"
---

# Signal integrity

Notes for when a fast signal fails at a connector.

## Traces, vias and returns

- [Ground cut](https://nearfieldnotes.com/notes/ground-cut/): Should you cut ground under connector pads? Yes, on high-speed pairs whose pads are wider than their traces. A hole the size of the pads takes USB-C’s 6% impedance dip to 0.5%, and one 0.2 mm bigger overshoots by 6%.
- [Eye diagram](https://nearfieldnotes.com/notes/eye-diagram/): How do you read an eye diagram? Measure the opening at its middle. Its height is your voltage margin and its width your timing margin. Then ask how many bits drew it. A 10 Gbit/s lane 82% open on a scope is 70% open at the 10¹² bits its spec counts.
- [TDR](https://nearfieldnotes.com/notes/tdr/): How do you read a TDR trace? As a map of the route. Across is distance: on this board, every 11.8 ps of echo time is 1 mm of trace. Up is impedance: a dip is extra capacitance, and a bump is extra inductance or a broken return path. Read it with the edge your spec names. The CM5 IO board’s USB-A socket pins read 67 Ω with a 15 ps edge and 83 Ω with USB 3.0’s 50 ps, inside its 90 ± 15 Ω.
- [Via stubs](https://nearfieldnotes.com/notes/via-stubs/): How long a via stub can a fast link take? About 23.6 mm divided by the lane’s rate in GBd: 2.3 mm for 10GBASE-KR, 0.7 mm for PCIe 5. Past that, the stub costs more than about 0.5 dB at the link’s Nyquist frequency. A via to layer 3 of a 1.6 mm board leaves 0.94 mm, fine to about 25 Gb/s.

## Links and coding

- [PHY and link layer](https://nearfieldnotes.com/notes/phy-link/): What does the PHY do, and what does the link layer do? The PHY decides how bits look on the wire. It sets the voltages, the line code and where the clock comes from. The link layer decides what the bits mean. It marks where a frame starts, who it’s for and whether it arrived intact. Either one can change while the other stays.
- [I3C vs I2C](https://nearfieldnotes.com/notes/i3c-vs-i2c/): What is I3C, and how does it differ from I2C? I3C is MIPI’s faster successor to I2C, on the same two wires. Its chips drive both lines up and down instead of waiting on pull-up resistors, so a 12-byte sensor read takes 13.1 µs and 28.2 nJ, against 344 µs and 203 nJ on I2C at 400 kHz. It also hands out addresses and carries interrupts over the bus, so the extra pins an I2C board needs go away.
- [Line codes](https://nearfieldnotes.com/notes/line-codes/): Why do fast serial links use line codes like 8b/10b? To keep edges coming so the receiver can find its clock, and to keep the line balanced so its coupling caps don’t charge up. 8b/10b does both by sending each byte as 10 bits, which is why SATA’s 6 Gb/s carries 600 MB/s, not 750. Faster links scramble the bits instead and add a short header to every 64 or 128, for 1.5 to 3%.
- [CRCs on fast links](https://nearfieldnotes.com/notes/crc/): How does a CRC catch bad bits, and what do fast links do when it fails? It divides the frame by a fixed polynomial and sends the remainder, and the receiver’s own division has to land on a known constant. Ethernet’s CRC-32 catches any 3 flipped bits in a full 1518-byte frame, and any burst up to 32 bits long. Ethernet drops a bad frame, PCIe and DDR memory send it again, and a cut-through switch that has already sent most of it stomps its CRC so the next box knows.

## Connectors and cables

- [USB-C alt modes](https://nearfieldnotes.com/notes/usb-c-alt-modes/): What can a USB-C port carry besides USB? Video, PCIe, headphones and debug links, in at least 12 ways besides plain USB. Most are agreed first in messages on CC, the configuration channel pin. Three are in wide use, three never caught on, two need only resistors, and four are vendors’ hidden modes.
- [Car camera coax](https://nearfieldnotes.com/notes/car-camera-coax/): How does one coax carry a car camera’s video, control and power? Power rides along as DC, and the data rides on top of it in both directions at once. Four coils keep the data out of the 12 V supply, and each chip subtracts its own signal to hear the other end. On Antmicro’s GMSL2 boards the coils hold 1 kΩ or more over 86% of the band ADI recommends, and over 15 m of coax the video loses 15.9 dB at 3 GHz, where ADI allows 21.1 dB.

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Source: https://nearfieldnotes.com/families/si/